PN512 selftest

  • 12. July 2018 at 14:34
    Hello...
    I try to make own reader with PN512 and AtXmega. I assume that board is working, and SPI communication is ok.
    At least if I read some registers from PN512 (CommandReg, CommIRqReg, WaterLevelReg, ModeReg) I got correct values as should be at poweron. Also if I write WaterLevelReg for example and read back I got correct value.

    But if I try to perform selftest I got totally unexpected result.
    Here is 'pseudocode' I execute. What are wrong.


    //1. Perform a soft reset.
    SpiWrite(CommandReg,SoftReset);

    //2. Clear the internal buffer by writing 25 bytes of 00h and perform the Config Command.
    SpiWrite(FIFODataReg,00*25);
    SpiWrite(CommandReg,Configure);

    //3. Enable the Selftest by writing the value 09h to the register AutoTestReg.
    SpiWrite(AutoTestReg,0x09);

    //4. Write 00h to the FIFO.
    SpiWrite(FIFODataReg,0x00);

    //5. Start the Selftest with the CalcCRC Command.
    SpiWrite(CommandReg,CalcCRC);

    //6. The Selftest will be performed.
    _delay_ms(1000); //do I need to check bussy? for now just wait

    //7. When the Selftest is finished, the FIFO contains the following bytes:
    SpiRead(FIFODataReg,64 bytes);

    And result is:
    0x00 0x05 0x09 0x09 0x09 0x09 0x09 0x09
    0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09
    0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09
    0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09
    0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09
    0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09
    0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09
    0x09 0x09 0x09 0x09 0x09 0x09 0x09 0x09

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    Re: PN512 selftest

    25. July 2018 at 8:46
    Hi Slavko

    For me it seems that you have problems with the FIFO. The datasheet 19.1 (page 107) says that you must write 0x09 into register “AutoTestReg”. Could it be that you wrote it into FIFO?

    The TapLinx team
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    Re: PN512 selftest

    31. July 2018 at 8:30
    I have messed something in read FIFO in SPI read. I didn't repeat the address as I should.

    Slavko.
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