Reply To: CLRC663 trouble receiving ones

Forum MIFARE and NFC Reader IC`s CLRC663 family CLRC663 trouble receiving ones Reply To: CLRC663 trouble receiving ones

Re: CLRC663 trouble receiving ones

27. March 2017 at 14:50
Here are all the register reads and writes I'm doing. It's basically the init values from the sample code, then some commands driven by libfreefare/libnfc.

"Set NN to XX" is a register write.

"Got NN as XX" is a register read.

Init sequence


Got 00 as 40 (Command)
Already set
Got 00 as 40 (Command)
Got 00 as 40 (Command)
Set 00 to 5f (Command)
Got 00 as 5f (Command)
Got 00 as 40 (Command)
Set 02 to 10 (FIFOControl)
Set 02 to 80 (FIFOControl)
Set 06 to 7f (IRQ0)
Set 07 to 7f (IRQ1)
Got 04 as 00 (FIFOLength)
fifo_write: 00 00
Got 08 as 10 (IRQ0En)
Set 08 to 10 (IRQ0En)
Got 09 as 00 (IRQ1En)
Set 09 to 40 (IRQ1En)
Got 00 as 40 (Command)
Set 00 to 4d (Command)
Got 00 as 40 (Command)
Set 08 to 00 (IRQ0En)
Set 09 to 00 (IRQ1En)
Set 02 to 90 (FIFOControl)
Set 28 to 8a (DrvMod)
Set 29 to 08 (TxAmp)
Set 2a to 21 (DrvCon)
Set 2b to 1a (Txl)
Set 2c to 18 (TxCrcPreset)
Set 2d to 18 (RxCrcPreset)
Set 2e to 08 (TxDataNum)
Set 2f to 27 (TxModWidth)
Set 30 to 00 (TxSym10BurstLen)
Set 31 to c0 (TXWaitCtrl)
Set 32 to 12 (TxWaitLo)
Set 33 to cf (FrameCon)
Set 34 to 00 (RxSofD)
Set 35 to 04 (RxCtrl)
Set 36 to 90 (RxWait)
Set 37 to 32 (RxThreshold)
Set 38 to 12 (Rcv)
Set 39 to 0a (RxAna)
Set 47 to 07 (SigOut)


Open driver


Antenna on
Set 00 to 00 (Command)
Antenna off
Set 00 to 40 (Command)
CRC TX on RX on
Got 2c as 18 (TxCrcPreset)
Set 2c to 19 (TxCrcPreset)
Got 2d as 18 (RxCrcPreset)
Set 2d to 19 (RxCrcPreset)
Parity on
Got 33 as cf (FrameCon)
Already set
Antenna on
Set 00 to 00 (Command)


Start anti-collision


Keep collided bits: true
Got 0c as 00 (RxBitCtrl)
Set 0c to 80 (RxBitCtrl)
CRC TX off RX off
Got 2c as 19 (TxCrcPreset)
Set 2c to 18 (TxCrcPreset)
Got 2d as 19 (RxCrcPreset)
Set 2d to 18 (RxCrcPreset)


First transfer


Got 00 as 00 (Command)
Already set
Set 02 to 90 (FIFOControl)
fifo_write: 26
bsp_mifare --> 26 (request, 7 bits)
Got 2e as 08 (TxDataNum)
Set 2e to 0f (TxDataNum)
Set 0a to 00 (Error)
Got 0a as 00 (Error)
Set 06 to 7f (IRQ0)
Set 07 to 7f (IRQ1)
Set 08 to 7f (IRQ0En)
Set 09 to 7f (IRQ1En)
Got 00 as 00 (Command)
Set 00 to 07 (Command)
Got 00 as 07 (Command)
Got 00 as 00 (Command)
Set 08 to 00 (IRQ0En)
Set 09 to 00 (IRQ1En)
Set 06 to 7f (IRQ0)
Set 07 to 7f (IRQ1)
Got 0a as 00 (Error)
Got 04 as 02 (FIFOLength)
Got 0c as 80 (RxBitCtrl)
bsp_mifare 93 20 (anticoll, 16 bits)
Got 2e as 0f (TxDataNum)
Set 2e to 08 (TxDataNum)
Set 0a to 00 (Error)
Got 0a as 00 (Error)
Set 06 to 7f (IRQ0)
Set 07 to 7f (IRQ1)
Set 08 to 7f (IRQ0En)
Set 09 to 7f (IRQ1En)
Got 00 as 00 (Command)
Set 00 to 07 (Command)
Got 00 as 07 (Command)
Got 00 as 00 (Command)
Got 00 as 00 (Command)
Set 08 to 00 (IRQ0En)
Set 09 to 00 (IRQ1En)
Set 06 to 7f (IRQ0)
Set 07 to 7f (IRQ1)
Got 0a as 00 (Error)
Got 04 as 05 (FIFOLength)
Got 0c as 00 (RxBitCtrl)
bsp_mifare <-- 88 00 00 00 00 (40 bits, 298027 us)


End anti-collision

RX align: 0
Got 0c as 00 (RxBitCtrl)
Already set
Keep collided bits: true
Got 0c as 00 (RxBitCtrl)
Set 0c to 80 (RxBitCtrl)
perform_anticollision: 16
CRC TX on RX on
Got 2c as 18 (TxCrcPreset)
Set 2c to 19 (TxCrcPreset)
Got 2d as 18 (RxCrcPreset)
Set 2d to 19 (RxCrcPreset)


Close driver


Antenna off
Set 00 to 40 (Command)


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